Most Radio Frequency (RF) amplifier systems exhibit nonlinearity. The effect of the nonlinearity is to produce distortion of the amplified signal that reduces the performance of the signal receiver, produces energy outside of the intended band of operation of the system, or interferes with adjacent carrier frequencies. These problems are particularly important in cellular telephony systems such as GSM, UMTS, cdma2000, and IS-95.
One way to reduce the level of distortion produced at the output of an amplifier is to operate the amplifier in a more linear region of its response. The disadvantage of this approach is that the amplifier operates in a ‘backed-off’ mode, which means that the amplifier uses energy from its power supply very inefficiently through wasted heat. Energy efficiency, and heat dissipation, are important factors in selecting equipment for use in cellular systems.
Other more advanced methods used to reduce the level of distortion are called linearization techniques. The two most common techniques are feedforward linearization and digital predistortion.
Digital predistortion has a number of advantages, however, a known problem exists in using digital predistortion for reducing distortion by linearization of the amplifier system. Typically in such systems, there is a digitally represented ‘desired’ output signal that is provided as the input to the amplifier system. At the same time, there is also a digitally represented ‘obtained’ signal that is taken from the actual amplifier output and passed back to the digital predistortion system. The goal of the digital predistortion system is to minimize the difference between the ‘obtained’ signal and the ‘desired’ signal. The minimization is made by correcting time-variant and time-invariant distortions in the amplifier, and its associated frequency-conversion circuits, using a process commonly called adaptation. In order for the adaptation to proceed, it is vital that the desired input signal and the obtained output signal are aligned very accurately in time. Unfortunately the delays through the amplifier analog circuits are variable from amplifier unit to amplifier unit. The delays also vary as the amplifier changes temperature and they also vary as the amplifier ages.
Since the delay through the amplifier cannot be known at manufacture for the lifetime of the amplifier, the digital predistortion system must both estimate the timing offset and correct it automatically. The usual methods for performing such timing error estimation and correction, known as delay-locked loops, are well known to those skilled in the art of radio modem design. However, there are drawbacks to the existing methods that are specific to the problem of predistortion. First of all, delay-locked loops are sensitive to input power. The loop-gain of the delay-locked loop is a function of the power of the ‘desired’ signal and the ‘obtained’ signal. Therefore, it is difficult to design a delay-locked loop that will converge quickly with the very low estimation error required for digital predistortion systems. Also, delay-locked loops are sensitive to the statistics of the input signal. In multi-carrier systems, the digital predistortion system and the amplifier must be capable of supporting more than one signal carrier. The loop gain and capture range of the delay-locked loop also depend upon the number of carriers that are active in the system. In some cases with many carriers, or when there are two carriers that are separated in frequency sufficiently, the capture-range of the delay-locked loop may be too low to reliably ‘pull in’ all expected timing errors. Also, there is an unavoidable trade-off in a delay-locked loop between the time to converge and the subsequent noise in the converged timing delay estimate. Many digital predistortion systems are required to be fully operational in as short a time as possible. This places design constraints upon the achievable timing error estimation precision that can be obtained with a delay-locked loop.
The prior art methods for timing error estimation are suitable for wireless receiver design where the accuracy of the timing error estimate is not of primary importance. In a predistortion system, the goal is to minimize the differences between the ‘desired’ and the ‘obtained’ signal. Therefore, any differences between the ‘desired’ and the ‘obtained’ signal that are due to slight timing differences must be minimized as much as possible. This is a much more stringent timing requirement than is usual in receiver systems.
Accordingly, a need presently exists for an improved system and method for timing error estimation and correction in a predistortion linearized wireless communication system.